esp32でmmd
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Feb 2, 2019 - C
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fpu
Here are 56 public repositories matching this topic...
IEEE 754 single and double precision floating point library in systemverilog and vhdl
asic fpga hardware vhdl verification riscv systemverilog floating-point newton-raphson fpu fused-multiply-add single-precision-floating-point double-precision-floating-point
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Jul 18, 2026 - VHDL
IEEE 754 single precision floating point library in systemverilog and vhdl
asic fpga hardware vhdl verification riscv systemverilog floating-point newton-raphson fpu fused-multiply-add single-precision-floating-point
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Jul 18, 2026 - VHDL
NoeticMaze is the embedded control and navigation project used for the NUCLEO-F446RE demonstration. The system integrates lidar, IMU, wheel encoders, differential-drive motor control, ICP-based localisation, grid mapping, A* path planning, path following, Bluetooth telemetry, and FreeRTOS task scheduling.
cmake dsp astar embedded-systems freertos spi slam usart stm32f4 pid-control dma icp slam-algorithms fpu lidar-point-cloud mpu6500 imu-sensor
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Jun 12, 2026 - C
Research enablement kit for designing and prototyping a Cortex-M0–based SoC with custom IP integration (education, research)
arm fpga aes prototyping verilog custom-ip cortex-m0 fpu designstart research-enablement research-enablement-kit semiconductor-research
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Jun 13, 2025
A chisel3 wrapper for pulp-platform/fpnew
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Apr 10, 2020 - SystemVerilog
This repository contains an assembly program written in AT&T syntax called FPU-Analyzer. The program analyzes a series of floating-point numbers and calculates their sum and average.
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Aug 6, 2023 - Assembly
A 5-stage pipelined RV32IMF RISC-V SoC optimized for FPGA (Nexys Video/4-DDR). Features a custom IEEE-754 FPU, interrupt-driven UART, and various peripherals.
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Mar 17, 2026 - C
X86-64 bilateral instruction tokenizer implemented in C. Supports the following processor extensions: AES, AVX, AVX2, AVX512, FMA, MMX, SSE, SSE2, SSE3, SSE4, x87(FPU), VMX. In order to ease testing, a diassembler which transforms tokens into compilable assembly (for NASM compiler) has been implemented.
aes x86-64 tokenizer disassembler avx sse avx2 sse2 software-analysis nasm fma avx512 sse3 vmx x87 mmx fpu sse4
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Oct 2, 2022 - C
IEEE 754 single-precision FPU (add/sub/mul) — lightweight Verilog implementation.
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Jul 19, 2026 - Verilog
IEEE-754 Compliant Floating Point Unit (FPU)
rust systemverilog fpu floating-point-substraction floating-point-adder floating-point-multiplier floating-point-divider
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Jun 25, 2026 - SystemVerilog
Mirror of VFLOAT from https://coe.northeastern.edu/Research/rcl/projects/floatingpoint/index.html
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Oct 30, 2021 - VHDL
Foreval is parser, compiler and evaluator of mathematical expressions in run-time with support complex numbers. After parsing and building tree of expression is perform optimization and compiling into x86-32 instructions and returns address of compiled expression. For expressions can by finding derivatives by symbolic or numerical differentiation.
delphi pascal compiler math-expressions scientific-computing complex-numbers expression-parser expression-evaluator math-parser x86-32 symbolic-differentiation fpu math-expression-parser math-compiler x86-assembly symbolic-derivative math-expression-compiler expression-compier evaluate-expression numeric-differentiation
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May 24, 2026 - Pascal
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